This is a Sample and Hold module to used with Voltage Controlled Analog Synthesizers. An input voltage is sampled and held for the duration of a sampling clock period. The output is thus a stairstep type waveform that changes its value at the rate of the sampling clock.
This design provides several possibilities for the sampling clock. The clock can be internally generated with its rate controlled by both a potentionmenter control and an external control voltage. With a flip of a switch, an external clock or a pushbutton can be used to manually sample the input.
The PDF documentation contains a full description of the circuit operation plus a second circuit that creates a random input voltage for the sample and hold with a voltage controlled rate of change.